Ein hochauflösender und hochdynamischer Bildsensor in TFA-Technologie

This Ph.D. thesis describes the development of the wide dynamic range and high resolution TFA (Thin Film on ASIC) image sensor ISAAC (Image Sensor Array with Adjustable Characteristic) and derives its basic characteristics using numerical simulations and analytical models.
Resolution is a key criterion in evaluating electronic images. The commonly given pixel density of a sensor, however, is not a sufficient measure, especially as technology feature sizes and pixel sizes keep shrinking. Previous work on the modulation transfer function (MTF) as the resolution limit, also taking into account the lens system of a camera, is supplemented in this dissertation.
The dynamic range is another decisive quantity, since naturally illuminated scenes do not fit into a voltage range of typically 60 dB in a linear fashion. The image signal is compressed and thereby a wide dynamic range is achieved using an adjustable overflow gate in each pixel of the ISAAC. The compression curve may be, but is not restricted to, a logarithmic characteristic, and
the photocurrent range to be covered in a voltage signal with 2 V swing may be as wide as 100 dB. Hence, ISAAC achieves a better sensitivity and signal-to-noise ratio than nonintegrating logarithmic sensors, and the overall complexity of the circuitry and the data rate is lower than in high-dynamic concepts with integration control or multiple readout.
The prototype ISAAC II has been designed for a 0.35 µm 3-metal double-poly CMOS process.
In TFA technology, an amorphous silicon thin film on top of the crystalline die acts as the optical detector, thereby increasing the fill factor of a pixel to 100%, at a high quantum efficiency and low dark current. Each pixel measures (7.7 µm)2 and includes three or four transistors. The sensor consists of a 256 x 256 pixel array, row select and column readout circuitry. It is operated in rolling shutter mode. In order to describe its characteristics, a detailed
model of the operation of the ISAAC II pixel is developed, including the sub-threshold behavior of the MOSFET that serves as the overflow gate, and several parasitic effects that are identified and evaluated. Special attention is paid to noise and fixed pattern noise whose transfer functions are derived for the various stages of signal readout. Hard-to-soft reset of the pixels, denoting that, after a short phase in the triode region, the reset transistor is operated in weak inversion, is employed to reduce both fixed pattern noise arising from the integration phase as well as the reset noise of the pixel. Pixel-to-pixel offset variations can be largely canceled through correlated double sampling in each column, while column-to-column variations are suppressed
using a single additional analog double delta sampling stage. Both circuits are capable of reducing a spatial standard deviation to less than 8% of its original value over a wide signal range. The ISAAC II prototype is ready to be fabricated provided that sufficient capacities are available.